// the take
A progressive, step-by-step implementation of CUDA GEMM kernels, from a naive non-coalesced version up through 2D tiling, warp tiling, vectorized loads, and finally WMMA tensor-core usage. It's built as a teaching artifact for understanding how each optimization technique affects throughput, not as a library to drop into a project.
The benchmark table makes the cost of each optimization step visible and comparable (0.28 TFLOPS naive FP32 up to ~20 TFLOPS with warp tiling + vectorized access, 55 TFLOPS with WMMA on FP16) — rare to see the incremental gains laid out this explicitly rather than jumping straight to a 'final' kernel. Covers both FP32 and FP16/tensor-core paths, so it doubles as a WMMA intro. Docker-based build pins the CUDA toolchain version, avoiding the usual 'works on my nvcc' drift.
Best custom kernel still trails cuBLAS by ~2.5x on FP16 (55 vs 139 TFLOPS) and the parameters are hand-tuned for one shape (4096^3) on one GPU (RTX 3090) — results on other sizes or architectures aren't validated, despite the correctness claim for 'any matrix size'. No automated tests, just profiling binaries, so there's no regression safety net if you fork and modify a kernel. Single-maintainer project with no commits since mid-2024 and no CI; if a newer CUDA toolkit breaks the Docker build, nobody's fixing it. Useful for learning the techniques, but you'd still reach for cuBLAS or CUTLASS for anything real.
We read the README, the directory tree and a key source file in October 2026. Nobody pays to be listed. How we judge →