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progranism/Open-Source-FPGA-Bitcoin-Miner

★ 1,374 · VHDL · GPL-3.0 · updated May 2022

A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.

A 2011-era open-source Bitcoin miner implemented in Verilog/VHDL targeting Altera and Xilinx FPGAs, primarily the Terasic DE2-115 board. It's a historical artifact — 109 MHash/s was competitive in 2011, but modern ASIC miners run at 100+ THash/s, so this is purely educational now.

The SHA-256 pipeline implementation is clean and readable — a good reference for anyone learning how to map cryptographic algorithms onto FPGA fabric. Multiple board targets (BeMicro, DE2-70, DE2-115, KC705) show real portability effort. Includes both Xilinx and Altera toolchain project files, so you're not locked to one vendor. The stratum pool communication code is a working example of FPGA-to-host protocol handling over USB.

Completely obsolete for any practical mining — the hashrate is roughly 1 billion times too slow to compete. Last meaningful commit was 2022 (tagging) but the core code is from 2011-2013, targeting Quartus II and ISE toolchains that Altera and Xilinx have since deprecated in favor of Quartus Prime and Vivado. The PC acts as a stratum proxy via USB, meaning standalone operation was never finished despite being mentioned in the README. Bitcoin's difficulty has scaled so far past what this hardware can produce that running it would cost far more in electricity than it could ever earn.

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