// the find
ucb-bar/AuRORA
Virtualized Accelerator Orchestration for Multi-Tenant Workloads
AuRORA is a research system from UC Berkeley that virtualizes hardware accelerators on RISC-V SoCs, letting multiple workloads share accelerators the way virtual memory shares DRAM. It's a full-stack research artifact — custom ISA extensions, microarchitecture shims, and a lightweight runtime — published at MICRO 2023 and selected as an IEEE Micro Top Pick. The audience is computer architecture researchers working on Chipyard/FireSim-based SoC designs, not engineers looking for something to deploy.
The disaggregated accelerator interface (ReRoCC) is a genuinely interesting design: it gives the illusion of tightly-coupled accelerators while physically decoupling them, which is a hard problem in SoC design. The full-stack approach — ISA extensions down to microarchitecture shims — is unusually complete for an academic artifact. Zenodo archives of all submodules mean the artifact is actually reproducible, which is rare in architecture research. IEEE Micro Top Pick selection means it passed peer review from people who care about implementation quality, not just idea novelty.
This is a research artifact, not a library or framework — the 22 stars and 4 forks tell you exactly how wide the usable audience is. The runtime is implemented inside Gemmini test files as a convenience, which means extracting it for a different accelerator requires real porting work with no documented path. Last push was November 2024 and the active development has clearly moved to the rerocc repo; this one is frozen. You need the full Chipyard/FireSim toolchain to do anything with it, which is a multi-day setup before you write a single line of code.