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vicharak-in/shrike
Low cost microcontroller + FPGA board for makers , hobbyist and student for endless possibility.
Shrike is Vicharak's family of low-cost FPGA dev boards, each pairing a 1120-LUT FPGA with a host microcontroller (RP2040, RP2350, or ESP32-S3). This repo is the teaching side: more than a dozen example designs, each with Verilog, a project file, and a prebuilt bitstream, plus docs. It fits makers and students who want a first FPGA board and are still learning Verilog.
- Most examples ship a prebuilt .bin beside the .ffpga project and Verilog source, and many include MicroPython host code under firmware/. You can flash a known-good bitstream and see the MCU-to-fabric link work before installing any synthesis tools.
- The protocol_translator folder is the most useful part: I2C-to-SPI, I2C-to-UART, SPI-to-I2C, and SPI-to-UART bridges, each built from slave or master cores and a small FIFO. That is a real FPGA-as-peripheral pattern, not another LED blink.
- docs/verilog_style_guide.md gives learners a house style to copy, and a few examples (i2c_led, pmod_dual_7seg, and two bridges) include testbenches, which is more than most hobbyist FPGA repos provide.
- The licensing is split and stated plainly: GPL-2.0 for software, CERN OHL v1.2 for the HDL and hardware files. Anyone adopting the code knows what they can ship.
- Synthesis goes through a vendor tool. The tools setup guide has Renesas login and Go Configure screenshots (renesas_login.png, goconfig_landing_page.png), so the open-source toolchain claim is only partly true. Confirm you can rebuild without a vendor account before committing to the board.
- CI is docs-only: .github/workflows contains just docs.yml. Nothing runs the testbenches, re-synthesizes the examples on PRs, or checks that the committed .bin files still match their .v sources. Expect drift between source and bitstream.
- Testbench coverage is thin. Only about four examples have a sim file, so most of the Verilog has only been checked on hardware. That is fine for blinking an LED, but it is weak support for the CORDIC and bridge designs.
- The repo is cluttered. archive/ holds old .uf2 firmware and an older MicroPython script next to current examples, and binaries (.bin, .uf2, .webm, PDF) are committed directly, which bloats clones. The README also still says the RP2350 Shrike is coming 'soon' on CrowdSupply, so check the board's status before buying.